A flash memory, a non-volatile memory semiconductor, has been the focus of attention in many fields as a substitute storage medium for a hard disk in a PC or a server, as well as for a portable terminal and embedded system since the flash memory is resistant to impact, operable with a low power and has a high degree of integration.
The flash memory is required to perform an erase operation of a corresponding location first to renew once stored data, unlike a general block such as a hard disk.
That is, a write operation of the flash memory is performed through changing a value of a required memory cell into ‘0’ in a state that values of all memory cells are initialized into ‘1’. As described above, to renew the stored data, every cell in the corresponding location is initialized into ‘1’, and then the write operation is performed again.
In this instance, a read operation and the write operation are performed in page units. The page of the flash memory indicates bytes having a physically successive address. The erase operation is performed in block units unlike the read operation and the write operation. The block of the flash memory indicates a plurality of physically successive pages. According to conventional embodiments, a size of the page is 512 B to 4 KB and a size of the block is 16 KB to 512 KB.
According to conventional example embodiments, the page of the flash memory is classified into a main region and subsidiary region. The main region stores data and the subsidiary region stores information related to the data stored in the main region and information related to the page. The information stored in the subsidiary region is referred to as meta-information. Examples of the meta-information include Cyclic Redundancy Check (CRC) or Error Correction Codes (ECC) information. The CRC or ECC may be used when detecting an error or verifying physical damage of the page during the write operation or read operation.
All of the read, write, and erase operations of the flash memory may inflict electrical stress to a memory cell where data is stored and cause minute wear. Therefore, when the flash memory is used for a long time, the memory cell, at last, may come to a state where ‘0’ is not normally discriminated from ‘1’.
Since a wear-level of the write operation and erase operation is much greater than a wear-level of the read operation, efforts to reduce a number of the write operations and erase operations occurring in a single memory cell as much as possible are required to extend a life span of the flash memory.
A conventional invention for equalizing the wear-level is a method of equalizing the wear-level in a block level that is a unit for the erase operation. That is, a method for managing the flash memory through recording a number of the erase operations and maintaining the number of the erase operations equal to or less than a certain number is suggested. The conventional method of equalizing the wear-level assumes that every memory cell belonged to a single block has the same wear-level. Also, the conventional method may not consider wear-level difference in each memory cell level.